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INTEGRATED CIRCUITS
74ALVC16836A 20-bit registered driver with inverted register enable (3-State)
Product specification Replaces datasheet 74ALVC16836 of 2000 Jan 04 IC24 Data Handbook 2000 Mar 14
Philips Semiconductors
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
FEATURES
* Wide supply voltage range of 1.2 V to 3.6 V * Complies with JEDEC standard no. 8-1A. * CMOS low power consumption * Direct interface with TTL levels * Current drive 24 mA at 3.0 V * MULTIBYTETM flow-through standard pin-out architecture * Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
PIN CONFIGURATION
OE Y1 Y2 GND Y3 Y4 VCC Y5 Y6 Y7 GND Y8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 CP A1 A2 GND A3 A4 VCC A5 A6 A7 GND A8 A9 A10 A11 A12 A13 GND A14 A15 A16 VCC A17 A18 GND A19 A20 LE
* Output drive capability 50 transmission lines @ 85C * Input diodes to accommodate strong drivers
DESCRIPTION
The 74ALVC16836A is a 20-bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Y9 Y10 Y11 Y12 Y13 GND Y14 Y15 Y16 VCC Y17 Y18 GND Y19 Y20 NC
SH00197
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25C; tr = tf 2.5 ns SYMBOL PARAMETER Propagation delay An to Yn; LE to Yn; CP to Yn Maximum clock frequency Input capacitance Input/Output capacitance transparent mode Output enabled Output disabled Clocked mode Output enabled Output disabled CONDITIONS TYPICAL 2.3 2.6 2.5 350 4.0 8.0 13 3 pF 22 15 UNIT
tPHL/tPLH fmax CI CI/O
VCC = 3.3 V, CL = 50 pF VCC = 3.3 V, CL = 50 pF
ns
MHz pF pF
CPD
Power dissipation capacitance per buffer
VI = GND to VCC1
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of outputs.
2000 Mar 14
2
853-2194 23314
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
ORDERING INFORMATION
PACKAGES 56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II TEMPERATURE RANGE -40C to +85C ORDER CODE 74ALVC16836A DGG DRAWING NUMBER SOT364-1
PIN DESCRIPTION
PIN NUMBER 28 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26, 27 4, 11, 18, 25, 32, 39, 46, 53, 56 7, 22, 35, 50 1 29 56 55, 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31, 30 SYMBOL NC Y1 to Y18 NAME AND FUNCTION No connection Data outputs
LOGIC SYMBOL
OE
GND VCC OE LE CP
Ground (0 V)
CP
Positive supply voltage Output enable input (active LOW) Latch enable input (active LOW) Clock input
LE
A1 to A18
Data inputs
A1
D LE CP Y1
TO THE 17 OTHER CHANNELS
SH00202
TYPICAL INPUT (DATA OR CONTROL)
VCC
A1
SH00200
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Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
LOGIC SYMBOL (IEEE/IEC)
OE CP LE 27 30 28 C3 G2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 Y18 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 26 1 1 3D 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 EN1 2C3
FUNCTION TABLE
INPUTS OE H L L L L L L H L X Z = = = = = LE X L L H H H H CP X X X H L A X L H L H X X Z L H L H Y01 Y02 OUTPUTS
HIGH voltage level LOW voltage level Don't care High impedance "off" state LOW-to-HIGH level transition
NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established.
SH00196
2000 Mar 14
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Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER DC supply voltage 2.5 V range (for max. speed performance @ 30 pF output load) VCC DC supply voltage 3.3 V range (for max. speed performance @ 50 pF output load) DC supply voltage (for low-voltage applications) VI VO Tamb tr, tf DC Input voltage range DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V CONDITIONS MIN 2.3 3.0 1.2 0 0 -40 0 0 MAX 2.7 3.6 3.6 VCC VCC +85 20 10 V V C ns/V V UNIT
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package -plastic thin-medium-shrink (TSSOP) For temperature range: -40 to +125 C above +55C derate linearly with 8 mW/K VI t0 For control pins1 For data inputs1 VO uVCC or VO t 0 Note 1 VO = 0 to VCC CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +4.6 -0.5 to VCC +0.5 "50 -0.5 to VCC +0.5 "50 "100 -65 to +150 600 UNIT V mA V mA V mA mA C mW
NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2000 Mar 14
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Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIH HIGH level Input voltage VCC = 2.3 to 2.7 V VCC = 2.7 to 3.6 V LOW level Input voltage VCC = 2.3 to 2.7 V VCC = 2.7 to 3.6 V VCC = 2.3 to 3.6 V; VI = VIH or VIL; IO = -100 A VCC = 2.3 V; VI = VIH or VIL; IO = -6 mA VOH HIGH level output voltage g VCC = 2.3 V; VI = VIH or VIL; IO = -12 mA VCC = 2.7 V; VI = VIH or VIL; IO = -12 mA VCC = 3.0 V; VI = VIH or VIL; IO = -12 mA VCC = 3.0 V; VI = VIH or VIL; IO = -24 mA VCC = 2 3 to 3 6V; VI = VIH or VIL; IO = 100 A 2.3 3.6V; VCC = 2.3 V; VI = VIH or VIL; IO = 6 mA VOL LOW level output voltage VCC = 2.3 V; VI = VIH or VIL; IO = 12 mA VCC = 2.7 V; VI = VIH or VIL; IO = 12 mA VCC = 3.0 V; VI = VIH or VIL; IO = 24 mA II IOZ ICC ICC Input leakage current In ut 3-State output OFF-state current Quiescent supply current Additional quiescent supply current VCC = 2.3 to 3.6 V; VI = VCC or GND V VCC = 2.3 to 3.6 V; VI = VIH or VIL; VO = VCC or GND VCC = 2.3 to 3.6 V; VI = VCC or GND; IO = 0 VCC = 2.3 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 VCC*0.2 02 VCC*0.3 VCC*0.6 VCC*0.5 VCC*0.6 VCC*1.0 1.7 2.0 TYP1 1.2 V 1.5 1.2 1.5 VCC VCC*0.08 VCC*0.26 VCC*0.14 VCC*0.09 VCC*0.28 GND 0.07 0.15 0.14 0.27 0.1 0.1 0.2 150 0 20 0.20 0.40 0.70 0.40 0.55 5 10 40 750 A A A A V V V V 0.7 V 0.8 MAX UNIT
VIL
NOTES: 1. All typical values are at Tamb = 25C.
2000 Mar 14
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Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
AC CHARACTERISTICS FOR VCC = 2.3 V TO 2.7 V RANGE
GND = 0 V; tr = tf 2.0 ns; CL = 30 pF SYMBOL Propagation delay An to Yn tPHL/tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH/tPZL tPHZ/tPLZ tW tS SU th fmax 3-State output enable time OE to Yn 3-State output disable time OE to Yn CP pulse width HIGH or LOW LE pulse width HIGH Set-up time An to CP Set-up time An to LE Hold time An to CP Hold time An to LE Maximum clock pulse frequency LIMITS PARAMETER WAVEFORM MIN 1, 7 2, 7 4, 7 6, 7 6, 7 4, 7 2, 7 5, 7 3, 7 5, 7 3, 7 4, 7 1.0 1.3 1.4 1.4 1.4 2.0 2.0 1.0 1.5 0.6 1.4 150 VCC = 2.3 to 2.7 V TYP1 2.4 2.8 2.8 2.2 2.0 - - - - 0.2 0.4 300 MAX 4.2 4.5 5.0 4.0 4.5 - - - - - - - ns ns ns ns ns MHz ns UNIT
NOTE: 1. All typical values are at VCC = 3.3 V and Tamb = 25C.
AC CHARACTERISTICS FOR VCC = 3.0V TO 3.6V RANGE AND VCC = 2.7V
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF SYMBOL LIMITS PARAMETER Propagation delay An to Yn tPHL/tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH/tPZL tPHZ/tPLZ tW tS SU th fmax 3-State output enable time OE to Yn 3-State output disable time OE to Yn CP pulse width HIGH or LOW LE pulse width HIGH Set-up time An to CP Set-up time An to LE Hold time An to CP Hold time An to LE Maximum clock pulse frequency WAVEFORM VCC = 3.3 0.3 V MIN 1, 7 2, 7 4, 7 6, 7 6, 7 4, 7 2, 7 5, 7 3, 7 5, 7 3, 7 4, 7 1.0 1.3 1.3 1.1 1.3 2.0 2.0 1.0 1.5 0.9 1.4 150 TYP1, 2 2.3 2.6 2.5 2.3 2.8 - - - - 0.3 0.3 300 MAX 3.6 4.2 4.2 4.4 4.3 - - - - - - - MIN 1.3 1.3 1.3 1.4 1.4 2.0 2.0 1.0 1.5 0.6 1.7 200 LIMITS VCC = 2.7 V TYP1 2.7 2.8 2.7 3.0 3.1 - - - - 0.3 0.4 350 MAX 4.0 4.5 4.5 4.5 4.3 - - - - - - - ns ns ns ns ns MHz ns UNIT
NOTES: 1. All typical values are measured Tamb = 25C. 2. Typical value is measured at VCC = 3.3 V
2000 Mar 14
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Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V AND VCC = 2.7 V RANGE
VM = 1.5 VCC VX = VOL + 0.3 V VY = VOH - 0.3 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = 2.7 V
1/fMAX VI CP INPUT GND VM tW VM
tPHL
VOH Yn OUTPUT VOL VM
tPLH
AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE
VM = 0.5 V VX = VOL + 0.15 V VY = VOH - 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC
VI An INPUT GND tPHL VOH Yn OUTPUT VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V VM tPLH VM
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00135
Waveform 4. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency.
VI CP INPUT GND tsu th tsu th VM
VI An INPUT GND VOH Yn OUTPUT
SH00132
VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00136
Waveform 1. Input (An) to output (Yn) propagation delay
VI LE INPUT GND VM tW VM
Waveform 5. Data set-up and hold times for the An input to the clock CP input
tPHL
VOH Yn OUTPUT VOL VM
tPLH
VI nOE INPUT GND VM
NOTE: VM = 0.5 VCC at VCC = 2.3 to 2.7 V
SH00165
Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays.
VCC OUTPUT LOW-to-OFF OFF-to-LOW VX VOL tPHZ VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V outputs disabled outputs enabled VY VM tPZH VM
VI An INPUT
VM
GND
th
th
tSU
tSU
VI LE INPUT
VM
GND NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00166
Waveform 6. 3-State enable and disable times
Waveform 3. Data set-up and hold times for the An input to the LE input
2000 Mar 14
8
EEEEEEEEEEEE EE EEEEEEEEEEEE EE EEEEEEEEEEEE EE
VM tPLZ tPZL
EEEEEEEEE EEE E EEE E EEEEEEEEE EEE EEEEEEE EEE
SH00137
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
TEST CIRCUIT
VCC S1 2 * VCC Open GND
VI PULSE GENERATOR RT D.U.T.
VO
RL = 500
CL
RL = 500
Test Circuit for switching times DEFINITIONS
RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 < VCC
GND
VCC < 2.7V 2.7-3.6V
VI VCC 2.7V
SV00906
Waveform 7. Load circuitry for switching times
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9
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
2000 Mar 14
10
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
NOTES
2000 Mar 14
11
Philips Semiconductors
Product specification
20-bit registered driver with inverted register enable (3-State)
74ALVC16836A
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Date of release: 03-00 Document order number: 9397-750-06959
Philips Semiconductors
2000 Mar 14 12

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